Difference between revisions of "EPROM Sensitivity"

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Line 97: Line 97:
  
 
*N: number of data collections
 
*N: number of data collections
*T50: median time half of bits are erased
+
*T50: estimated typical time half of bits are erased
*T100: median time all bits are first erased in a stable manner
+
*T100: estimated typical time all bits are first erased in a stable manner
 +
*estimated typical time: currently RMS of N samples
  
  

Latest revision as of 09:56, 30 March 2022

eetime results

https://github.com/JohnDMcMaster/eetime/

https://proghq.org/media/eetime/

McMaster

These results are intended to be relative to each other and easy to interpret even if they have shortcomings. Raw data files are linked above for the curious

Vendor Device T50 (sec) T100 (sec) N S/Ns Notes
AMD AM2764ADC 200.2 315 5 EE05

EE06

EE07

EE08

EE09

Atmel AT27C256R 45.3 72.7 1 EE23
Intel D27C256 54.9 81.5 3 E01
SSS M2764AFI 83.6 124.6 5 E10

E11

E12

E13

E14

ST M27C256B 348.5 701.3 3 E17

E18

ST M27C512 129.7 195.2 10 E20

E21

E22

TI TMS2764 0 75.5 6 EE02

EE03

EE04

Where:

  • N: number of data collections
  • T50: estimated typical time half of bits are erased
  • T100: estimated typical time all bits are first erased in a stable manner
  • estimated typical time: currently RMS of N samples


Baseline is:

  • New USHIO G4T5 bulb
  • Bulb to chip distance: based on PE-140T EPROM eraser
  • Some results are scaled based on calibration tests
    • Ex: bulb2 takes longer so results are scaled back