Xeltek: Difference between revisions

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= 5000E =
= 5000E =


```
the shift reg rings are used to assign a pin to GND/Vdd1/2/3
raw
 
```
I/O is done direct from the FPGA I/O pin with a resistor/diode clamp
 
for internal stuff, it was an Atmel ARM of some kind, a discrete USB device controller, an Xeltek "ASIC" and a Spartan 2 (IIRC)
 
I'm pretty sure the Xeltek ASIC was actually an OTP FPGA
 
(didn't do anything but basic LED control, bus multiplexing, and related stufs)

Revision as of 05:48, 18 May 2018


Superpro and such

5000E

the shift reg rings are used to assign a pin to GND/Vdd1/2/3

I/O is done direct from the FPGA I/O pin with a resistor/diode clamp

for internal stuff, it was an Atmel ARM of some kind, a discrete USB device controller, an Xeltek "ASIC" and a Spartan 2 (IIRC)

I'm pretty sure the Xeltek ASIC was actually an OTP FPGA

(didn't do anything but basic LED control, bus multiplexing, and related stufs)