https://proghq.org/w/api.php?action=feedcontributions&feedformat=atom&user=Zndwo 2026-04-15T06:05:51Z User contributions MediaWiki 1.41.1 https://proghq.org/w/index.php?title=Xeltek&diff=432 2018-05-18T06:57:58Z

<p>Zndwo: </p> <hr /> <div>[[Category:Vendor]]<br /> <br /> Superpro and such<br /> <br /> = 5000E =<br /> <br /> == Hardware ==<br /> The 5000E is internally composed of an 8 board stack. From top to bottom, the boards are:<br /> <br /> * GND DRV<br /> * V3 DRV<br /> * V3 (P1-72) DRV<br /> * V1 DRV<br /> * V2 DRV<br /> * IO BOARD<br /> * MCU BOARD<br /> * POWER BOARD<br /> <br /> === Voltage Pin Driver Boards ===<br /> <br /> The V1/V2/V3* and GND drive boards share a similar topology. A set of shift registers is used to configure a transistor high or low-side drive. The GND board has two additional relays on pins, possibly for support of some high current device. The V1, V2 and V3 boards use a 74HC4094 shift reg, a ULN2003 transistor array and a high-side transistor to switch the voltage. The V2 and V3 boards incorporate a diode to prevent reverse biasing of the transistor which suggests the V1 voltage is the highest voltage used.<br /> <br /> === IO Board ===<br /> <br /> The IO board is just a Spartan XC2S50E FPGA connected to each IO line through a 220 ohm resistor and a diode voltage clamp. Whether the I/O voltage tracks one of the supplies (V3?) is unknown.<br /> <br /> === MCU Board ===<br /> <br /> Components:<br /> <br /> * AT91R40008 Processor (ARM7, no rom, very few peripherals, external bus interface)<br /> * TLC7226 Quad DAC <br /> * EN29LV040A Flash (512kB)<br /> * &quot;Xeltek AE81&quot; (Almost certainly an OTP FPGA)<br /> * USB Device controller (part # unreadable in photos)<br /> <br /> === Power Board ===<br /> <br /> * 3x LM317 + 3x MC34063 switchers<br /> * Topology not yet reversed<br /> * Misc op amps<br /> <br /> == Software ==<br /> <br /> A basic bootloader / USB loader is resident in the on-board flash. The Host software communicates with this USB loader and downloads the actual programming routines into SRAM.</div>

Zndwo https://proghq.org/w/index.php?title=Xeltek&diff=431 2018-05-18T06:57:40Z

<p>Zndwo: </p> <hr /> <div>[[Category:Vendor]]<br /> <br /> Superpro and such<br /> <br /> = 5000E =<br /> <br /> == Hardware ==<br /> The 5000E is internally composed of an 8 board stack. From top to bottom, the boards are:<br /> <br /> - GND DRV<br /> - V3 DRV<br /> - V3 (P1-72) DRV<br /> - V1 DRV<br /> - V2 DRV<br /> - IO BOARD<br /> - MCU BOARD<br /> - POWER BOARD<br /> <br /> === Voltage Pin Driver Boards ===<br /> <br /> The V1/V2/V3* and GND drive boards share a similar topology. A set of shift registers is used to configure a transistor high or low-side drive. The GND board has two additional relays on pins, possibly for support of some high current device. The V1, V2 and V3 boards use a 74HC4094 shift reg, a ULN2003 transistor array and a high-side transistor to switch the voltage. The V2 and V3 boards incorporate a diode to prevent reverse biasing of the transistor which suggests the V1 voltage is the highest voltage used.<br /> <br /> === IO Board ===<br /> <br /> The IO board is just a Spartan XC2S50E FPGA connected to each IO line through a 220 ohm resistor and a diode voltage clamp. Whether the I/O voltage tracks one of the supplies (V3?) is unknown.<br /> <br /> === MCU Board ===<br /> <br /> Components:<br /> <br /> * AT91R40008 Processor (ARM7, no rom, very few peripherals, external bus interface)<br /> * TLC7226 Quad DAC <br /> * EN29LV040A Flash (512kB)<br /> * &quot;Xeltek AE81&quot; (Almost certainly an OTP FPGA)<br /> * USB Device controller (part # unreadable in photos)<br /> <br /> === Power Board ===<br /> <br /> * 3x LM317 + 3x MC34063 switchers<br /> * Topology not yet reversed<br /> * Misc op amps<br /> <br /> == Software ==<br /> <br /> A basic bootloader / USB loader is resident in the on-board flash. The Host software communicates with this USB loader and downloads the actual programming routines into SRAM.</div>

Zndwo https://proghq.org/w/index.php?title=Xeltek&diff=430 2018-05-18T06:56:58Z

<p>Zndwo: Xeltek 5000 Details</p> <hr /> <div>[[Category:Vendor]]<br /> <br /> Superpro and such<br /> <br /> = 5000E =<br /> <br /> == Hardware ==<br /> The 5000E is internally composed of an 8 board stack. From top to bottom, the boards are:<br /> <br /> - GND DRV<br /> - V3 DRV<br /> - V3 (P1-72) DRV<br /> - V1 DRV<br /> - V2 DRV<br /> - IO BOARD<br /> - MCU BOARD<br /> - POWER BOARD<br /> <br /> === Voltage Pin Driver Boards ===<br /> <br /> The V1/V2/V3* and GND drive boards share a similar topology. A set of shift registers is used to configure a transistor high or low-side drive. The GND board has two additional relays on pins, possibly for support of some high current device. The V1, V2 and V3 boards use a 74HC4094 shift reg, a ULN2003 transistor array and a high-side transistor to switch the voltage. The V2 and V3 boards incorporate a diode to prevent reverse biasing of the transistor which suggests the V1 voltage is the highest voltage used.<br /> <br /> === IO Board ===<br /> <br /> The IO board is just a Spartan XC2S50E FPGA connected to each IO line through a 220 ohm resistor and a diode voltage clamp. Whether the I/O voltage tracks one of the supplies (V3?) is unknown.<br /> <br /> === MCU Board ===<br /> <br /> Components:<br /> <br /> - AT91R40008 Processor (ARM7, no rom, very few peripherals, external bus interface)<br /> - TLC7226 Quad DAC <br /> - EN29LV040A Flash (512kB)<br /> - &quot;Xeltek AE81&quot; (Almost certainly an OTP FPGA)<br /> - USB Device controller (part # unreadable in photos)<br /> <br /> === Power Board ===<br /> <br /> - 3x LM317 + 3x MC34063 switchers<br /> - Topology not yet reversed<br /> - Misc op amps<br /> <br /> == Software ==<br /> <br /> A basic bootloader / USB loader is resident in the on-board flash. The Host software communicates with this USB loader and downloads the actual programming routines into SRAM.</div>

Zndwo